PART |
Description |
Maker |
MPC2105A MPC2106ASG66 MPC2105B |
(MPC2105x / MPC2106x) 512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms 512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms 128K X 72 CACHE TAG SRAM MODULE, 9 ns, DMA178 512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms 512KBMB的二级缓存模块BurstRAM为PowerPC制备/ CH旺平
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Motorola, Inc. Motorola Mobility Holdings, Inc.
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MCM72CF64SG66 MCM72CF32 MCM72CF32SG66 |
256KB and 512KB BurstRAM Secondary Cache Module for Pentium
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MOTOROLA[Motorola, Inc]
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M29F800DB M29F800DB55M1E M29F800DB55M1F M29F800DB5 |
8 Mbit (1Mb x8 or 512Kb x16, Boot Block) 5V Supply Flash Memory
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STMICROELECTRONICS[STMicroelectronics]
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M29W800DB |
8 MBIT (1MB X8 OR 512KB X16, BOOT BLOCK) 3V SUPPLY FLASH MEMORY 8 MBIT (1MB X8 OR 512KB X16, BOOT BLOCK) 3V SUPPLY FLASH MEMORY
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ST Microelectronics STMicroelectronics
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29F800 M29F800AB M29F800AT -M295V800AB90N3T M295V8 |
Circular Connector; MIL SPEC:MIL-DTL-38999 Series II; Body Material:Metal; Series:JT; No. of Contacts:28; Connector Shell Size:18; Connecting Termination:Crimp; Circular Shell Style:Box Mount Receptacle; Body Style:Straight RoHS Compliant: No 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Single Supply Flash Memory 8 Mbit 1Mb x8 or 512Kb x16 / Boot Block Single Supply Flash Memory
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ST Microelectronics 意法半导 STMicroelectronics
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MPC2003SG50 MPC2003SG60 MPC2003SG66 MPC2002 MPC200 |
256KB and 512KB BurstRAM Secondary Cache Module for PowerPC - Based Systems 64K X 36 CACHE SRAM MODULE, 9 ns, DMA136 256KB and 512KB BurstRAM Secondary Cache Module for PowerPC - Based Systems 64K X 36 CACHE SRAM MODULE, 14 ns, DMA136
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Motorola Mobility Holdings, Inc. Motorola, Inc. MOTOROLA[Motorola, Inc]
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M29W800AT90M1T M29W800AT90M5T M29W800AT90M6T M29W8 |
8 Mbit (1Mb x8 or 512Kb x16, Boot Block) Low Voltage Single Supply Flash Memory
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STMicroelectronics
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GS81032AT-150I GS81032AT-138I GS81032AT-133I GS810 |
18ns 66MHz 32K x 32 1Mb synchronous burst SRAM 12ns 100MHz 32K x 32 1Mb synchronous burst SRAM 10ns 133MHz 32K x 32 1Mb synchronous burst SRAM 9.7ns 138MHz 32K x 32 1Mb synchronous burst SRAM 11ns 117MHz 32K x 32 1Mb synchronous burst SRAM 9ns 150MHz 32K x 32 1Mb synchronous burst SRAM 32K x 32 1M Synchronous Burst SRAM 32K X 32 CACHE SRAM, 9.7 ns, PQFP100 32K x 32 1M Synchronous Burst SRAM 32K X 32 CACHE SRAM, 18 ns, PQFP100 32K x 32 1M Synchronous Burst SRAM 32K X 32 CACHE SRAM, 10 ns, PQFP100 32K x 32 1M Synchronous Burst SRAM
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GSI Technology, Inc.
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M29W800T90M5R M29W800T90N5R M29W800B M29W800T90N5T |
8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory Low-Power Single Postitive-Edge-Triggered D-Type Flip-Flop 5-DSBGA -40 to 85 8兆x812KB的x16插槽,引导块低压单电源闪 LED Lamp; Bulb Size:T-1 3/4; LED Color:Red; Luminous Intensity:5mcd; Viewing Angle:60 ; Forward Current:20mA; Forward Voltage:2V; Operating Temperature Range:-40 C to 85 C; Leaded Process Compatible:Yes RoHS Compliant: Yes LED Lamp; Bulb Size:T-1 3/4; LED Color:Red; Luminous Intensity:150ucd; Viewing Angle:30 ; Forward Current:20mA; Forward Voltage:2V; Operating Temperature Range:-40 C to 85 C; Color:Red; Leaded Process Compatible:Yes RoHS Compliant: Yes LED Lamp; Bulb Size:T-1 3/4; LED Color:Red; Luminous Intensity:18ucd; Viewing Angle:30 ; Forward Current:20mA; Forward Voltage:2V; Operating Temperature Range:-40 C to 85 C; Color:Red; Leaded Process Compatible:Yes RoHS Compliant: Yes 8 Mbit 1Mb x8 or 512Kb x16 / Boot Block Low Voltage Single Supply Flash Memory 122 x 32 pixel format, LED or EL Backlight available
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STMicroelectronics N.V. ST Microelectronics 意法半导
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M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V 18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机 Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation. Renesas Electronics, Corp.
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MT58L64L18F MT58L32L32F MT58L32L36F |
32K x 323.3V I/O, Flow-Through SyncBurst SRAM(1Mb,3.3V输入/输出,流通式同步脉冲静态RAM) 32K x 363.3V I/O, Flow-Through SyncBurst SRAM(1Mb,3.3V输入/输出,流通式同步脉冲静态RAM) 64K x 18, 3.3V I/O, Flow-Through SyncBurst SRAM(1Mb,3.3V输入/输出,流通式同步脉冲静态RAM) 64K的18.3V的I / O的流量通过SyncBurst的SRAM兆,3.3V的输输出,流通式同步脉冲静态内存)
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Micron Technology, Inc.
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